Design and ASIC Implementation of Modified Shift-and-Add Algorithm using Redundant Arithmetic Integrator Adder and Subtractor

Abstract

Abstract: Shift and Add Algorithm, also referred to as Volder's algorithm and the digit-by-digit technique. This is a specialized digital computer designed for airborne real-time processing. To calculate the trigonometric relationships involved in a plane coordinate rotation and conversion from rectangular to polar coordinates, a specific computational technique is used in this case. Additionally, the shift and add algorithm apply to modern systems, square roots, logarithms, and exponential expressions. Trigonometric functions are highly important in computation units; currently, many mathematical functions Sine, Cosine, Tangent, etc., by applying this approach, it is very simple to compute. Redundant arithmetic is used to lower the delay and boost the speed of operation. The adders play a significant part in the shift and add algorithm and carry propagation in adders causes the delay to increase quickly and slow down the speed of operation. Carry-propagation chains are produced by conservative operations like addition, multiplication, and subtraction. To rectify this issue, redundant number schemes are used. Using redundant numbers by speeding up mathematical operations. This technique is applied in signal processing and other areas. In this paper, an efficient and modified shift-and-add algorithm is designed, which is used to minimize the rotation angles. The main idea of the algorithm is to replace the carry select adder with an Integrated Redundant Arithmetic adder and subtractor, to achieve better latency and maximum throughput. By using redundant adders, the algorithm can be implemented with high speed and low power.

Index Terms: Shift and Add algorithm, Carry Select Adder (CSLA), Redundant Arithmetic Adder (RAA), rotation angles, Cadence-Innovus.