Low Power RF Low Noise Amplifier Design for 5G Wi-Fi Receiver
Abstract
Abstract: This paper presents the design of a differential Low Noise Amplifier (LNA) for a 5th generation Wi-Fi Receiver. The circuit is implemented with 90nm transistors using CMOS technology. The proposed differential LNA for 5G Wi-Fi (IEEE 802.11ac) is designed by combining two single-ended 5G Wi-Fi LNAs with optimized design values. The gate and source degenerated inductance values are optimized to achieve a 5GHz frequency of operation. Noise neutralization capacitors of 10pF are used to reduce the channel noise in the MOSFETs used in the circuit. The differential LNA achieves 93.6% input matching, an input impedance of 45.94Ω, a transducer gain of 25.76dB, a noise figure of 1.52dB, P1dB of -11.7dBm and IIP3 of 3.17dBm.
Index Terms: CMOS, Noise Figure, 1dB compression point (P1dB), Third Order Input Intercept Point (II3), harmonic signal, ISM Band
