FPGA Realization of Logic Gates using Neural Networks

Abstract

The real time systems are designed by using analog and digital sub systems with control logic. In the design of digital sub systems the logic gates are the major building blocks. The Neural Networks found many applications in the areas of pattern recognition, prediction, artificial intelligence and other applications. Most of the Neural Network designs are realized by using software domain and hardware domains. This paper presents the hardware realization of logic gates using Neural Network.

 The logic gates like NAND, AND, NOR, OR, NOT, BUFFER are realized by using single layer neural network. The XNOR and XOR logic gates are realized by using structural representation of neural network based universal NAND gates. All the logic gates are realized by using Verilog HDL with Xilinx Vivado Design suite targeting for Xilinx Zynq-7000 SoC Evaluation Board. The Neural Network based logic gates are simulated for different test cases.

Index Terms: Neural Network, Logic Gate, Zynq-7000 SoC, Verilog HDL, Xilinx Vivado EDA tool.