Performance Analysis of Load Balancing Queues in User Level Runtime Systems for Multi-Core Processors

  • Vikranth B CVR College of Engineering, Department of IT, Hyderabad, India

Abstract

The speed of single processors is limited by the speed of light or speed of electron. Hence, processor manufacturers are packing multiple low speed processors or cores on to the same chip which are called multi-core processors. The number of processors on single chip is gradually increasing. Though multi-core processors are similar to Symmetric Multi-Processors (SMP), there are notable differences between them like shared last level cache. Operating systems consider these multi-core processors as SMP, and apply the suitable methods for task-scheduling and load balancing. But these strategies cannot fully explore the details of multi-core processors. The software also must be written to take the advantage of these multi-core processors. In this context, user level runtime systems evolved with a task as primitive concurrency construct. These tasks created by the program during runtime are added to the queues at user level runtime. In this paper, we analyze the performance of various user level queues and their contention using Java.

Published
2019-08-09