ASIC Implementation of Various Sorting Techniques for Image Processing Applications

Abstract

The direct implementation of parallel algorithms in hardware is possible with the help of current VLSI technology. The process of arranging the items systematically is known as Sorting. Different meanings of sorting are: ordering: items arrangement in a sequence ordered by using some criterion; categorizing: similar property items grouping. The latest VLSI model analyses the complexity of time. The novel model makes a distinction between “processing” circuits and “memory” circuits; the latter are less important since they are denser and consume less power. This paper addresses the design and analysis of various sorting algorithms, and its VLSI implementation based on a sorting network. The various sorting algorithms are Sinking sort, Merge sort and Library sort; all the three sorting algorithms are compared in terms of area, power and timing with a complete comparison table. Mainly these types of sorting algorithms are used in a real time system; signal processing, image and video processing applications. All the blocks were designed using Verilog HDL, simulated using ncvlog simulator, synthesized in cadence-RTL Compiler and finally implemented in ASIC Encounter using GPDK 45nm technology libraries.