Design Procedure for Digital and Analog ICs using Cadence Tools

Abstract

The present portable electronic devices like smartphones, Laptops etc. are capable of multi functional andmulti domain application areas. These types of applicationsare possible due to the Integrated Circuit (IC) technologychanges in terms of reduction in transistor size, supplyvoltage, time to market etc. These types of complex System onChip (SoC) devices are designed by using Electronic DesignAutomation (EDA) tools to meet all nonfunctional IC designconstraints. The selection of EDA tool is based on the type ofIC design flow, design analysis, designer domain knowledge,nonfunctional optimization constraints etc. This paper givesan overview of Cadence company based VLSI EDA designtools and tool flow procedures for Digital and Analog ICs.