Implementation of Multi-Dimensional FFTs using FPGA

Abstract

This paper presents the implementation of multidimensional Fast Fourier Transform (FFT). In this implementation the FFT is calculated separately per each dimension in the pipeline. The resultant three dimensional pipeline FFT is implemented on an FPGA. The implemented FPGA can calculate the 3-dimensional (3D) FFT for a data which consists of 2563 samples with each sample with word size of 32- bits. The main challenge of this paper is the permutations between the one dimensional FFT modules. For these permutations, the storage memory is an external DDR2 SDRAM and on chip memory BRAM. The resultant multidimensional FFT is hardware efficient with very less latency around 84.2 msec.